Table of Contents
1st SAFARI Live Workshop (SaLWo) 2025
Workshop Description
This is a four-day workshop, where SAFARI and affiliated researchers share their cutting edge research in four main focus areas: 1) Memory Robustness, 2) Health Applications, 3) Data-Centric and Energy-Efficient Computing, and 4) Storage Systems.
The workshop is held in-person at ETH Zurich and livestreamed online.
Program at a Glance
| Theme | Date. | Detailed Program | Location | Livestream | |
|---|---|---|---|---|---|
| Day 1 | Memory Robustness | July 10, 2025 | Program | CAB G 11 | YouTube |
| Day 2 | Health Applications | July 14, 2025 | Program | CAB G 11 | YouTube |
| Day 3 | Data-Centric and Energy Efficient Computing | July 21, 2025 | Program | CAB G 11 | YouTube |
| Day 4 | Storage Systems | September 19, 2025 | Program | ETZ E 81 | YouTube |
Day 1: SaLWo on Memory Robustness
- Date: July 10, 2025
- Location: CAB G 11, ETH Zurich
- Livestream: YouTube
Dynamic Random Access Memory (DRAM) is the dominant memory technology powering a wide range of computing systems—from mobile phones and laptops to workstations and large-scale servers. As such, the reliability and security of DRAM are critical to system correctness and stability. However, DRAM faces persistent and evolving challenges. Its volatile nature, coupled with the increasing density of modern memory chips, makes it particularly susceptible to reliability issues and system-level vulnerabilities. Phenomena such as read disturbance errors (e.g., RowHammer and the recently discovered RowPress) become increasingly severe as manufacturing technologies scale down to smaller feature sizes. Moreover, the future likely holds new classes of disturbance errors and unforeseen reliability risks.
Beyond reliability, DRAM's role as a shared resource across cores and applications exposes it to numerous security threats, including side-channel attacks, Denial-of-Service (DoS) exploits, and cold-boot attacks. These vulnerabilities pose major concerns for both academia and industry, prompting active research into detection, mitigation, and prevention strategies.
This workshop will feature a series of talks by researchers from the SAFARI Research Group, summarizing key recent contributions and offering insights into future research directions. We welcome researchers, practitioners, students, and industry professionals interested in memory systems, computer architecture, hardware security, and system reliability.
Join us in-person or online to learn, share, and contribute to shaping the future of secure and dependable memory technologies.
Day 2: SaLWo on Health Applications
- Date: July 14, 2025
- Location: CAB G 11, ETH Zurich
- Livestream: YouTube
High-throughput sequencing (HTS) technologies have revolutionized the field of genomics, enabling rapid and cost-effective genome analysis for various applications. However, the increasing volume of genomic data generated by HTS technologies presents significant challenges for computational techniques to effectively analyze genomes. To address these challenges, both algorithmic and hardware acceleration techniques have been examined by researchers.
Many pure algorithmic and software techniques aim to address the computational challenges in the genome analysis pipeline. These works improve the performance and accuracy of the computational tools by reducing overall computational and space complexity, eliminating useless work, optimizing data structures and memory access patterns, exploiting parallelism in multicore, many-core, and SIMD architectures, and employing machine learning techniques. Since software techniques alone are not effective enough at coping with huge amounts of genomic data and the stringent requirements of genome analysis, it is critical to design software-hardware cooperative techniques to accelerate genome analysis. To this end, several works co-design algorithms and architectures to substantially improve the performance and energy efficiency of the genome analysis pipeline. These works reduce data movement overheads by employing processing in memory (PIM), or processing near storage (e.g., solid-state drives) and efficiently co-design and execute computationally complex algorithms with massive parallelism and efficient hardware design using specialized architectures, e.g., field programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).
This workshop will feature a series of talks by researchers from the SAFARI Research Group, summarizing key recent contributions in the directions previously described and offering insights into future research directions.
We welcome researchers, practitioners, students, and industry professionals interested in bioinformatics, accelerated architectures for genomics and metagenomics applications, health applications, Processing-In-Memory and Processing-In-Storage.
Join us in-person or online to learn, share, and contribute to shaping the future of secure and dependable memory technologies.
Day 3: SaLWo on Data-Centric and Energy-Efficient Computing
- Date: July 21, 2025
- Location: CAB G 11, ETH Zurich
- Livestream: YouTube
Data-centric computing is a computing paradigm that aims to overcome data movement bottlenecks by making memory systems compute-capable. Explored over several decades since the 1960s, data-centric computing is becoming a reality with the advent of the first commercial processing-in-memory (PIM) products and prototypes. PIM can improve performance and energy efficiency for many modern applications. However, there are many open questions spanning the entire computing stack and many challenges for widespread adoption. This workshop will focus on the latest advances in PIM technology, spanning both hardware and software, and other techniques to improve system-wide energy efficiency.
Day 4: SaLWo on Storage Systems
- Date: September 19, 2025
- Location: ETZ E 81, ETH Zurich
- Livestream: YouTube
Modern storage systems consist of multiple technologies where processing can be performed, such as processing-using-flash/DRAM and processing-near-flash/DRAM. Our vision of storage-centric computing sees the entire storage system as a specialized-enough accelerator that can execute many types of computation efficiently to accelerate important workloads. As such, storage-centric computing can make use of special-purpose accelerators as well as general-purpose computation mechanisms along with multiple different memory types inside the storage system. Most importantly, the storage system becomes a first-class citizen where computation takes place when it makes sense to do so from a user/application- and system-level perspective, which can greatly improve different metrics, such as performance, energy efficiency, system cost, and sustainability, at the same time. We will cover many works on fundamentally improving efficiency and performance of many workloads (AI, Genome Analytics, Homomorphic Encryption, Databases) and systems with storage-centric solutions.