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--- start [2025/01/23 10:52] – geraldod
+++ start [2025/04/25 12:13] (current) – ssadrosa
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-~~NOCACHE~~
+===== 3rd Workshop on =====
+===== Memory-Centric Computing Systems (MCCSys) - 21 June 2025 =====
-===== ASPLOS 2025 1st Workshop on =====
-===== Memory-Centric Computing Systems - MCCSys =====
 ==== Workshop Description ====
 Processing-in-Memory (PIM) is a computing paradigm that aims to overcome data movement bottlenecks by making memory systems compute-capable.  Explored over several decades since the 1960s, PIM systems are now becoming a reality with the advent of the first commercial products and prototypes. PIM can improve performance and energy efficiency for many modern applications. However, there are many open questions spanning the entire computing stack and many challenges for widespread adoption.
+{{:memory_centric_comp_isca_banner.png?400 |}}
 This combined tutorial and workshop will focus on the latest advances in PIM technology, spanning both hardware and software. It will include novel PIM ideas, different tools and frameworks for conducting PIM research, and programming techniques and optimization strategies for PIM kernels. First, we will provide a series of lectures and invited talks that will provide an introduction to PIM, including an overview and a rigorous analysis of existing PIM hardware from industry and academia. Second, we will invite the broad PIM research community to submit and present their ongoing work on memory-centric systems. The program committee will favor papers that bring new insights on memory-centric systems or novel PIM-friendly applications, address key system integration challenges in academic or industry PIM architectures, or put forward controversial points of view on the memory-centric execution paradigm. We also consider position papers, especially from industry, that outline design and process challenges affecting PIM systems, new PIM architectures, or system solutions for real state-of-the-art PIM devices.
-==== Procedure for Selecting Papers for Presentations (Workshops) ====
+==== Procedure for Selecting Presentations ====
-Submissions must be original, unpublished work and not under consideration at another conference or journal. The authors must use the MCCSys hotcrp to submit their papers. Papers must be formatted for US letter (not A4) size paper using the Microsoft Word or LaTeX templates provided on the IEEE website. The length of the submitted papers should be 5 pages at maximum, excluding references. Appendices count towards the page limit, while the main body of the paper should be self-contained. Paper submissions will go through a double-blind reviewing process by the MCCSys program committee and should not include author names or affiliations. At least one author for each accepted paper is required to present the paper at the workshop.
+This workshop consists of invited talks on the general topic of memory-centric computing systems. There are a limited number of slots for invited talks. If you would like to deliver a talk on related topics, please contact us by filling out [[https://docs.google.com/forms/d/e/1FAIpQLSfg3ojDWG37YMozlK5RjuyCbrix0mAPDoZ17v3-3hZEb94ULg/viewform?usp=sharing | this form]]. The submission deadline is **May 23, 2025, 23:59 AoE**. We invite abstract submissions related to (but not limited to) the following topics in the context of memory-centric computing systems:
+  * Design of novel and new processing-in-memory (PIM) architectures, including system solutions for real state-of-the-art PIM devices
-We expect that at least some papers at MCCSys would represent “work-in-progress” projects. Therefore, authors of published papers could choose to extend their work to full-length conference papers later.
+  * Analysis and mapping of novel applications to state-of-the-art PIM systems
+  * Programming models and code generation support for PIM
+  * Runtime engines for adaptive code and data scheduling, data mapping, access control for PIM systems
+  * Memory coherence mechanisms for collaborative host–PIM execution
+  * Virtual memory support for a unified host and PIM address space
+  * Data structures and algorithms for PIM systems
+  * Infrastructures to assess the benefits and feasibility of PIM systems, including benchmarks and simulation infrastructures for PIM prototyping
+  * Issues related to robustness and security of PIM systems
+  * Experimental analysis and benchmarking of real PIM systems
 ==== Livestream ====
+[[https://www.youtube.com/live/E0f0RmfPzA4?feature=shared|YouTube livestream]]
+{{youtube>E0f0RmfPzA4?large}}
 ==== Organizers ====
@@ Line 21: / Line 31: @@
 |[[https://geraldofojunior.github.io/|Geraldo F. Oliveira]]| <geraldod@safari.ethz.ch> |
 |[[https://ee.ethz.ch/the-department/people-a-z/person-detail.MjM3MTk5.TGlzdC8zMjc5LC0xNjUwNTg5ODIw.html|Dr. Mohammad Sadrosadati]] | <mohammad.sadrosadati@safari.ethz.ch> |
+|[[https://agyaglikci.github.io/|Dr. A. Giray Yağlıkçı]] | <mohammad.sadrosadati@safari.ethz.ch> |
 |[[http://ataberkolgun.com/|Ataberk Olgun]] | <ataberk.olgun@safari.ethz.ch> |
 |[[https://people.inf.ethz.ch/omutlu/index.html|Professor Onur Mutlu]]| <onur.mutlu@safari.ethz.ch> |
-===== Submit =====
-This workshop is composed of invited talks on the general topic of memory-centric computing systems. There are a limited number of slots for invited talks. If you would like to deliver such a talk on related topics, please contact us by filling out [[https://docs.google.com/forms/d/e/1FAIpQLScZggsL93cxUV9OH2_rt0L6GIAQpGJAL7ulRIBusIrAwL2gfA/viewform?usp=sharing | this]] form.  The submission deadline is **February 15, 2025, 23:59 AoE**. We invite abstract submissions related to (but not limited to) the following topics in the context of memory-centric computing systems:
-  * Design of novel and new processing-in-memory (PIM) architectures, including system solutions for real state-of-the-art PIM devices
-  * Analysis and mapping of novel PIM-friendly applications to state-of-the-art PIM systems
-  * Programming models and code generation support for PIM
-  * Runtime engines for adaptive code and data scheduling, data mapping, access control for PIM systems
-  * Memory coherence mechanisms for collaborative host–PIM execution
-  * Virtual memory support for a unified host and PIM address space
-  * Data structures for many-core PIM systems
-  * Infrastructures to assess the benefits and feasibility of PIM systems, including benchmarks and simulation infrastructures for PIM prototyping
 ===== Agenda =====